Introduction for Digital VLSI Design

 

The laboratory on the course ECL-523: Digital VLSI Circuit Design covers the basic CMOS integrated Circuit design, simulation, and testing techniques. Several tools from the Cadence Design System have been integrated into the lab to teach students the idea of computer aided design (CAD) and to make the VLSI experience more practical.

To fully appreciate the material in this lab course, the student should have a minimal background with the following computer systems, equipment, and circuit analysis techniques. Students should be familiar with the LINUX operating system.

 

List of Experiments for Digital VLSI Design

 1 Design Layout and Simulate an nMOS using S-editor and L-editor.

2 Design Layout and Simulate a pMOS using S-editor and L-editor. 

3 Design Layout and Simulate a CMOS Inverter with following characteristics:Logic Threshold Voltage = 2.5 v, Power Supply = 5 v, Capacitive load = 1 pF

4 Design and simulate CMOS inverter for DC and Transient analyses in     Cadence Spectre.

5 Design the layout of a CMOS inverter in Cadence Virtuoso.

6 Design and simulate 2-input NAND gate for DC and Transient analyses in  Cadence Spectre.

7 Identify Static and Dynamic power dissipation in a CMOS inverter.

8 Design and simulate the circuit using Cadence Spectre of the following Boolean Function A(D+E)( B+C)

9 Design a XOR gate and Multiplexer using Transmission gates.

10 Design and simulate a D-latch using NAND gates.

11Design Half adder & Full adder circuits using NAND gates.

12 Design a Divide by 2 circuit using S-editor and L-editor and estimate Power dissipated.

13Design a simple two-phase Clock generator. Also, do the Power Analysis calculating Dynamic Power of the circuit with conclusion.

14 Design a Schmitt Trigger circuit using S-editor.

15 Choose any low power full adder circuit and compare the power dissipated with a conventional full adder circuit.